High Performance Sensors by Using Silicon Nanowire Array

30. Mai 2018, 11:00 , 12:30

Veranstalter:  Tie Li, Shanghai Institute of Microsystem and Information Technology, CAS, Shanghai, China
Ort:  A1 3-330


Highly responsive SiNWs with narrow sizes (~20nm) and high aspect ratios were ‘top-down’ fabricated with

a complementary metal oxide semiconductor (CMOS) compatible technique. The process employed the ani-

sotropic self-stop etching was developed to form silicon nanowires on silicon-on-insulator (SOI) wafers,

whose CMOS compatibility, as well as low cost character, make it attractive for future manufacture of inte-

grated devices based on silicon nanowires. With the help of SiNWs, we have demonstrated a simple, portable

and rapid detection platform for high performance detections.

CV: Tie Li received his BS and PhD degrees from University of Science and Technology of China, Hefei, in

1992 and 1997, respectively. He then was a Post-doctor at Shanghai Institute of Microsystem and Information

Technology. He was a visiting scholar at Delphi Research Labs for 18 months from 2002. He is currently a

Professor in Shanghai Institute of Microsystem and Information Technology. He has published over 150

papers on Nano Letters, Small、Carbon、IEEE EDL etc., and owned 51 Chinese patents and 1 US Patent.

His research interests include design, fabrication and application of Micro and Nano sensors.

Eingeladen von: Prof. Dr. Sergej Fatikow